The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2023

Filed:

Aug. 06, 2021
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventor:

Ming-Hui Tung, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/10 (2006.01); H03K 17/30 (2006.01); H03K 17/04 (2006.01); G06F 13/38 (2006.01); H03K 17/041 (2006.01);
U.S. Cl.
CPC ...
H03K 17/102 (2013.01); G06F 13/382 (2013.01); H03K 17/04106 (2013.01); H03K 17/302 (2013.01);
Abstract

The present invention discloses a signal output apparatus. Each of two output circuits includes an inverter including an input terminal and an output terminal, and a resistor coupled between the output terminal and a differential output terminal. Each of MOS capacitors is coupled between the output terminals. Under a first operation mode, two current supplying circuits are disabled. The input terminals respectively receive a high and a low state input voltages and the output terminals generate a low and a high state output voltages. The capacitances become larger than a predetermined level. Under a second operation mode, one of the current supplying circuits is enabled to output a supplying current to the differential output terminal. The input terminals receive the high state input voltage. The output terminals generate the low state output voltage. The capacitances become not larger than the predetermined level.


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