The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2023

Filed:

Sep. 29, 2021
Applicant:

Lenovo Global Technology (United States) Inc., Morrisville, NC (US);

Inventors:

Paul T. Artman, Cary, NC (US);

Martin W Hiegl, Herrenberg, DE;

Andrew Junkins, Cary, NC (US);

Assignee:

Other;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 13/42 (2006.01); H01R 12/79 (2011.01); H01R 12/77 (2011.01); H01R 12/71 (2011.01); H05K 7/20 (2006.01); H01R 12/70 (2011.01);
U.S. Cl.
CPC ...
G06F 13/4068 (2013.01); G06F 13/4282 (2013.01); H01R 12/79 (2013.01); H01R 12/714 (2013.01); H01R 12/774 (2013.01); H05K 7/20509 (2013.01); G06F 2213/0026 (2013.01); H01R 12/7047 (2013.01); H01R 12/7058 (2013.01);
Abstract

An interposer includes a planar substrate and a pad array formed on a bottom side of the planar substrate to connect with a pin array within a CPU socket. A serial computer expansion bus connector is formed on the top side of the planar substrate and is electronically coupled to a portion of the pad array. The interposer further includes a perimeter structure adapted for securing to a CPU carrier. The interposer may be included in a kit with a heatsink securable to the CPU socket, wherein the heatsink includes a contact area for contacting the interposer and applying a load to the interposer. A printed circuit board assembly may include first and second CPU sockets that are connected by a CPU interconnect, where the interposer may be installed in the first CPU socket and a CPU may be installed in the second CPU socket.


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