The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2023
Filed:
Feb. 28, 2020
Applicant:
Western Digital Technologies, Inc., San Jose, CA (US);
Inventors:
Doron Ganon, Kfar Vradim, IL;
Eitan Lerner, Karmiel, IL;
Assignee:
Western Digital Technologies, Inc., San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G06F 11/00 (2006.01); G01R 31/3183 (2006.01); G01R 31/00 (2006.01); G06F 1/04 (2006.01); G06F 7/64 (2006.01); G06F 30/347 (2020.01);
U.S. Cl.
CPC ...
G01R 31/318335 (2013.01); G01R 31/002 (2013.01); G06F 1/04 (2013.01); G06F 7/64 (2013.01); G06F 30/347 (2020.01);
Abstract
The present disclosure generally relates to an embedded physical layer (EPHY) for a field programmable gate array (FPGA). The EPHY for the FPGA is for a testing device that can receive and transmit in both the high speed PHYs, as well as low speed PHYs, such as MIPI PHYs (MPHYs), to meet universal flash storage (UFS) specifications. The testing device with the EPHY for the FPGA provides flexibility to support any specification updates without the need of application specific (ASIC) production cycles.