The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Sep. 03, 2021
Applicant:

University of Florida Research Foundation, Incorporated, Gainesville, FL (US);

Inventors:

Swarup Bhunia, Gainesville, FL (US);

Christopher Vega, Gainesville, FL (US);

Shubhra Deb Paul, Gainesville, FL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/1776 (2020.01); H04L 9/08 (2006.01); H03K 19/173 (2006.01); H03K 19/17728 (2020.01);
U.S. Cl.
CPC ...
H03K 19/1776 (2013.01); H03K 19/1737 (2013.01); H03K 19/17728 (2013.01); H04L 9/0866 (2013.01);
Abstract

Methods and systems are directed to creating a physical unclonable function (PUF) on a Field Programmable Gate Array (FPGA) and generating a unique signature for a device. The method includes, in part, designing a PUF by taking advantages of programmable logic elements on the FPGA, and extracting uninitialized values associated with one or more storage elements comprised in the PUF when the FPGA is powered up. The extracted uninitialized values can be combined to generate the unique signature for the device. The one or more storage elements can be bi-stable memory cells that are mapped to look up tables (LUTs) on the FPGA. The coordinates of these LUTs can be determined based on hamming distance analysis. Alternatively, the one or more storage elements can be memory cells associated with boundary scan cells of a boundary scan chain.


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