The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Apr. 16, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Joseph Michael Leisten, Cork, IE;

Salvatore Giombanco, Cassaro, IT;

Filippo Marino, Tremestieri Etneo, IT;

Rosario Davide Stracquadaini, San Gregorio di Catania, IT;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/42 (2007.01); H02M 1/32 (2007.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 1/4225 (2013.01); H02M 1/0038 (2021.05); H02M 1/32 (2013.01);
Abstract

In an example, a system comprises a boost power factor correction (PFC) converter that includes a thermistor, an inductor, and a transistor and a PFC controller coupled to a common node. The PFC controller includes a comparator coupled to a threshold voltage source and to a terminal of the transistor. A first flip-flop is coupled to the comparator and to a control terminal of the transistor. A zero current detector is coupled to the inductor. A timer is coupled to the comparator and to the zero current detector. A second flip-flop is coupled to the timer and to the control terminal of the transistor. An AND gate is coupled to the first and second flip-flops. The circuit includes third and fourth flip flops.


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