The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

May. 14, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyungmin Jin, Seoul, KR;

Jindo Byun, Suwon-si, KR;

Younghoon Son, Yongin-si, KR;

Youngdon Choi, Seoul, KR;

Junghwan Choi, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0802 (2016.01); G11C 7/10 (2006.01); G11C 8/06 (2006.01); H03K 19/00 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0802 (2013.01); G11C 7/1048 (2013.01); G11C 8/06 (2013.01); H03K 19/0027 (2013.01); H03K 19/018521 (2013.01);
Abstract

A multi-level signal transmitter includes a voltage selection circuit, which is configured to select one amongst a plurality of driving voltages, which have different voltage levels, in response to input data including at least two bits of data therein. A driver circuit is also provided, which is configured to generate an output data signal as a multi-level signal, in response to the selected one of the plurality of driving voltages. This selected signal is provided as a body bias voltage to at least one transistor within the driver circuit. This driver circuit may include a totem-pole arrangement of first and second MOS transistors having respective first and second body bias regions therein, and at least one of the first and second body bias regions may be responsive to the selected one of the plurality of driving voltages.


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