The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Oct. 15, 2020
Applicant:

Purdue Research Foundation, West Lafayette, IN (US);

Inventors:

Mustafa Ali, West Lafayette, IN (US);

Akhilesh Jaiswal, West Lafayette, IN (US);

Kaushik Roy, West Lafayette, IN (US);

Assignee:

Purdue Research Foundation, West Lafayette, IN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/505 (2006.01); G06F 17/16 (2006.01); G06F 7/74 (2006.01); G06F 7/491 (2006.01);
U.S. Cl.
CPC ...
G06F 7/5052 (2013.01); G06F 7/4912 (2013.01); G06F 7/74 (2013.01); G06F 17/16 (2013.01);
Abstract

An in-memory vector addition method for a dynamic random access memory (DRAM) is disclosed which includes consecutively transposing two numbers across a plurality of rows of the DRAM, each number transposed across a fixed number of rows associated with a corresponding number of bits, assigning a scratch-pad including two consecutive bits for each bit of each number being added, two consecutive bits for carry-in (C), and two consecutive bits for carry-out-bar (), assigning a plurality of bits in a transposed orientation to hold results as a sum of the two numbers, for each bit position of the two numbers: computing the associated sum of the bit position; and placing the computed sum in the associated bit of the sum.


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