The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2023
Filed:
Jul. 15, 2019
Xilinx, Inc., San Jose, CA (US);
VSS Prasad Babu Akurathi, Hyderabad, IN;
Sabarathnam Ekambaram, Hyderabad, IN;
Sasi Rama S. Lanka, Challapalli, IN;
Hari Bilash Dubey, Hyderabad, IN;
Milind Goel, Faridabad, IN;
XILINX, INC., San Jose, CA (US);
Abstract
A circuit for implementing an input/output connection in an integrated circuit device is described. The circuit comprises a pull-up circuit comprising a first plurality of transistors coupled in series, wherein a gate of a first transistor of the first plurality of transistors is configured to receive a first dynamic bias signal; a pull-down circuit comprising a second plurality of transistors coupled in series, the pull-down circuit being coupled to the pull-up circuit at an output node, wherein a gate of a first transistor of the second plurality of transistors is configured to receive a second dynamic bias signal; and an input/output contact coupled to the output node. A circuit for implementing an input/output connection in an integrated circuit device including a splitter circuit for receiving an input signal on an input pad is also described. A method of implementing an input/output connection in an integrated circuit device is also described.