The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2023

Filed:

Jun. 05, 2021
Applicant:

Dongguan Changgong Microelectronics Ltd, Dongguan, CN;

Inventor:

Guanghua Ye, Dongguan, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H02M 3/156 (2006.01);
U.S. Cl.
CPC ...
H02M 3/1586 (2021.05); H02M 3/1563 (2013.01); H02M 3/1588 (2013.01);
Abstract

This present invention is an invented synchronous clock generator for the multiphase DC-DC converter system, comprising a front-end buffer circuit, a ramp signal generator circuit, a configurable equally divided reference voltage generator circuit, a set of comparators, a 10-ns pulse generator, multiple 30-ns pulse generators, and a pulse combination circuit. The synchronous clock generator can produce a clock pulse signal SYNC at N (total phase number) times the single-phase switching frequency. Within one synchronous loop period, a 10-ns pulse is first generated and followed by N-1 30-ns pulses. The master power stage chip detects the 10-ns pulse, and all the slave power stages detect and count the 30-ns pulses to determine when to set their output signal PWM. Thus, the invention can produce the new SYNC signal immediately with balanced phase shift while allowing the changing of the total phase number N by the total phase number register.


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