The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2023

Filed:

Sep. 25, 2020
Applicant:

Alpha and Omega Semiconductor (Cayman) Ltd., Grand Cayman, KY;

Inventor:

Shekar Mallikarjunaswamy, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 29/66 (2006.01); H01L 27/08 (2006.01); H01L 29/861 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0255 (2013.01); H01L 27/0262 (2013.01); H01L 27/0814 (2013.01); H01L 29/66098 (2013.01); H01L 29/861 (2013.01);
Abstract

A transient voltage suppressor (TVS) device uses a punch-through silicon controlled rectifier (SCR) structure for the low-side steering diode where the punch-through SCR structure realizes low capacitance at the protected node. In some embodiments, the punch-through silicon controlled rectifier of the low-side steering diode includes a first doped region formed in a first epitaxial layer, a first well formed spaced apart from the first doped region where the first well is not biased to any electrical potential, and a second doped region formed in the first well. The first doped region, the first epitaxial layer, the first well and the second doped region form the punch-through silicon controlled rectifier, with the first doped region forming the anode and the second doped region forming the cathode of the punch-through silicon controlled rectifier.


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