The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2023
Filed:
Jul. 16, 2021
Applicant:
Korea University Research and Business Foundation, Seoul, KR;
Inventors:
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4091 (2006.01); G11C 11/4096 (2006.01); G11C 11/4094 (2006.01); H03K 19/21 (2006.01); G06F 7/523 (2006.01); H03K 19/173 (2006.01); G06F 7/544 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G06F 7/523 (2013.01); G06F 7/5443 (2013.01); G11C 11/4094 (2013.01); G11C 11/4096 (2013.01); H03K 19/1737 (2013.01); H03K 19/215 (2013.01);
Abstract
An in-memory computing device includes a memory cell array and a column peripheral circuit including a plurality of column peripheral units connected to a plurality of pairs of bit lines connected to the memory cell array. Each of the column peripheral units includes a sense amplifying and writing unit sensing and amplifying bitwise data through one pair of bit lines among the pairs of bit lines and an arithmetic logic unit performing an arithmetic operation with a full adder Boolean equation based on the bitwise data and performing a write back operation on operation data obtained by the arithmetic operation via the sense amplifying and writing unit.