The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2023

Filed:

Jun. 29, 2017
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Jeremy Fowers, Seattle, WA (US);

Eric S. Chung, Woodinville, WA (US);

Douglas C. Burger, Bellevue, WA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/063 (2006.01); G06F 9/38 (2018.01); G06N 3/04 (2006.01); G06F 17/16 (2006.01);
U.S. Cl.
CPC ...
G06N 3/063 (2013.01); G06F 9/3867 (2013.01); G06N 3/04 (2013.01); G06F 17/16 (2013.01); G06N 3/0481 (2013.01);
Abstract

Hardware and methods for neural network processing are provided. A method in a hardware node including a pipeline having a matrix vector unit (MVU), a first multifunction unit connected to receive an input from the matrix vector unit, a second multifunction unit connected to receive an output from the first multifunction unit, and a third multifunction unit connected to receive an output from the second multifunction unit is provided. The method includes performing using the MVU a first type of instruction that can only be performed by the MVU to generate a first result. The method further includes performing a second type of instruction that can only be performed by one of the multifunction units and generating a second result and without storing the any of the two results in a global register, passing the second result to the second multifunction and the third multifunction unit.


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