The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2023

Filed:

Oct. 05, 2021
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Jungwon Suh, San Diego, CA (US);

Dexter Tamio Chun, San Diego, CA (US);

Michael Hawjing Lo, San Diego, CA (US);

Shyamkumar Thoziyoor, San Diego, CA (US);

Ravindra Kumar, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/0875 (2016.01);
U.S. Cl.
CPC ...
G06F 3/0625 (2013.01); G06F 3/0634 (2013.01); G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 12/0875 (2013.01); G06F 2212/1028 (2013.01); G06F 2212/45 (2013.01);
Abstract

Methods and apparatuses for improve data clock to reduce power consumption are presented. The apparatus includes a memory configured to receive a data clock from a host via a link and to synchronize the data clock with the host. The memory includes a clock tree buffer configured to toggle based on the data clock to capture write data or to output read data and a command decoder configured to detect a data clock suspend command while the data clock is synchronized between the host and the memory. The clock tree buffer is configured to disable toggling based on the data clock in response to the command decoder detecting the data clock suspend command. the host includes a memory controller configured to provide a data clock suspend command to the memory via the link while the data clock is synchronized between the host and the memory.


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