The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2023
Filed:
Jul. 26, 2018
Applicant:
Seiko Epson Corporation, Tokyo, JP;
Inventors:
Hideo Haneda, Matsumoto, JP;
Akio Tsutsumi, Chino, JP;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01S 7/4861 (2020.01); H03F 3/45 (2006.01); H03F 3/68 (2006.01); G01S 17/06 (2006.01); G04F 10/00 (2006.01); G01S 17/931 (2020.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
G01S 7/4861 (2013.01); G01S 17/06 (2013.01); G01S 17/931 (2020.01); G04F 10/005 (2013.01); H03F 3/45071 (2013.01); H03F 3/68 (2013.01); H03F 2200/129 (2013.01); H03F 2200/156 (2013.01); H03F 2200/231 (2013.01); H03F 2200/267 (2013.01); H03F 2200/297 (2013.01); H03F 2200/414 (2013.01); H03F 2203/45156 (2013.01); H03M 1/12 (2013.01); H03M 1/1225 (2013.01);
Abstract
A circuit device includes an analog front-end circuit that receives a target signal is input, and a processing circuit that performs arithmetic processing based on an output signal from the analog front-end circuit. The analog front-end circuit includes a plurality of comparator circuits that compare the voltage level of the target signal to a plurality of threshold voltages and output a plurality of comparison result signals. The processing circuit obtains the transition timing of the target signal based on the comparison result signals and delayed-time information of the analog front-end circuit.