The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2023

Filed:

Oct. 14, 2021
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Nicola Errico, Rho, IT;

Marzia Annovazzi, Milan, IT;

Alessandro Cannone, Marsala, IT;

Enrico Ferrara, Milan, IT;

Gea Donzelli, Caronno Pertusella, IT;

Paolo Turbanti, Milan, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); H03M 1/06 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1071 (2013.01); H03M 1/0687 (2013.01);
Abstract

In an embodiment, a circuit includes N sensing channels. Each channel includes a first main sensing node and a second redundancy sensing node paired therewith. N analog-to-digital converters (ADCs) are coupled to the first sensing nodes, with digital processing circuits coupled to the N ADCs. A pair of multiplexers are coupled to the second sensing nodes and to the N ADCs with a further ADC coupled to the output of the second multiplexer. An error checking circuit is coupled to the outputs of the second multiplexer and the further ADC to compare, at each time window in a sequence of N time windows, a first digital value and a second digital value resulting from conversion to digital of: an analog sensing signal at one of the first sensing nodes, and an analog sensing signal at the second sensing node paired with the selected one of the first sensing nodes.


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