The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2023

Filed:

Feb. 24, 2022
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Hoiju Chung, San Jose, CA (US);

Paul Fahey, Campbell, CA (US);

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/36 (2006.01); G11C 29/42 (2006.01); G11C 29/44 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G11C 29/36 (2013.01); G11C 29/44 (2013.01); G11C 29/52 (2013.01); G11C 2029/4402 (2013.01);
Abstract

A memory system may include a memory controller suitable for transmitting write data and a first write ECC corresponding to the write data during a write operation, a first error correction circuit suitable for detecting whether the write data received from the memory controller has an error, using the first write ECC received from the memory controller, and correcting the error when the error is detected, a second ECC generation circuit suitable for generating a second write ECC using the write data received from the memory controller, and generating the second write ECC using the write data whose error has been corrected by the first error correction circuit, when the detection of the error is noticed from the first error correction circuit, and one or more memories suitable for storing the second write ECC and write data corresponding to the second write ECC.


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