The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2023
Filed:
Jan. 31, 2020
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Ankit Srivastava, San Diego, CA (US);
Seyed Arash Mirhaj, San Diego, CA (US);
Guoqing Miao, San Diego, CA (US);
Seyfi Bazarjani, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06G 7/12 (2006.01); G11C 11/412 (2006.01); G11C 11/419 (2006.01); G06G 7/16 (2006.01);
U.S. Cl.
CPC ...
G06G 7/12 (2013.01); G11C 11/412 (2013.01); G11C 11/419 (2013.01); G06G 7/16 (2013.01);
Abstract
A compute-in-memory bitcell is provided that includes a pair of cross-coupled inverter for storing a stored bit. The compute-in-memory bitcell includes a logic gate for multiplying the stored bit with an input vector bit. An output node for the logic gate connects to a second plate of a capacitor. A first plate of the capacitor connects to a read bit line.