The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2023

Filed:

Oct. 15, 2021
Applicant:

Dell Products, L.p., Round Rock, TX (US);

Inventors:

Robert T. Stevens, Austin, TX (US);

Elie Antoun Jreij, Pflugerville, TX (US);

Bhavesh Govindbhai Patel, Austin, TX (US);

Mukund P. Khatri, Austin, TX (US);

Assignee:

Dell Products, L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06F 9/54 (2006.01); G06F 9/4401 (2018.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4022 (2013.01); G06F 9/4406 (2013.01); G06F 9/546 (2013.01); G06F 13/28 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Embodiments of systems and methods for inter-Baseboard Management Controller (BMC) integration for High Performance Computing (HPC) platforms are described. In some embodiments, an HPC platform may include a first BMC coupled to a host processor; and a hardware accelerator comprising: (a) one or more managed subsystems coupled to the host processor, and (b) a second BMC coupled to the one or more managed subsystems and decoupled from the host processor, wherein the first BMC and the second BMC are coupled to each other via a high-speed, Out-of-Band (OOB) management link.


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