The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2023

Filed:

Jun. 29, 2021
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventor:

Kedar Rajpathak, Bengaluru, IN;

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/317 (2006.01); H03K 19/20 (2006.01); G06F 21/57 (2013.01);
U.S. Cl.
CPC ...
G01R 31/31727 (2013.01); H03K 19/20 (2013.01); G06F 21/577 (2013.01); G06F 2221/034 (2013.01);
Abstract

Methods and structures are described for detecting clock anomalies. Example methods include measuring a duration of a first phase of the clock signal, monitoring a duration of a second phase of the clock signal, and determining whether the duration of the second phase has exceeded the measured duration of the first phase. If so, a clock stop detection signal is asserted. Example structures include a detector circuit having an input for sensing the clock signal. The circuit is operable to measure a duration of a first clock phase instance, to monitor a duration of a second clock phase instance, and to assert an output if the duration of the second clock phase instance exceeds the measured duration of the first clock phase instance.


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