The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2023

Filed:

Feb. 11, 2022
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Bouchaib Cherif, Yorktown Heights, NY (US);

Max Earl Nielsen, Pocatello, ID (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/92 (2006.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
H03K 17/92 (2013.01); G06F 1/10 (2013.01);
Abstract

Trap circuits for use with superconducting integrated circuits having capacitively-coupled resonant clock networks are described. An example superconducting integrated circuit (IC) includes a clock structure coupled: (1) to a first Josephson junction (JJ) via a first capacitor, where the first capacitor is configured to receive a clock signal via the clock structure and couple a first bias current to the first JJ, and (2) to a second JJ via a second capacitor, where the second capacitor is configured to receive a clock signal via the clock structure and couple a second bias current to the second JJ. The superconducting IC further includes a trap circuit coupled between the first capacitor and the first JJ, where the trap circuit is configured to attenuate any signals generated by a triggering of the first JJ to reduce crosstalk between the first JJ and the second JJ.


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