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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11652028 B1

PDFFull Text
Date of Patent:
May. 16, 2023

Filed:

Jan. 28, 2021

Power semiconductor device and method for fabricating a power semiconductor device

Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Andre Wedi, Soest, DE;

Carsten Ehlers, Mönchengladbach, DE;

Arthur Unrau, Geseke, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:

Murphy, Bilak & Homiller, PLLC

Primary Examiner:

Ajay Arora

Int. Cl.
CPC ...
H01L 23/49 (2006.01); H01L 21/48 (2006.01); H01L 23/08 (2006.01); H01L 23/14 (2006.01); H01L 23/31 (2006.01); H01L 23/492 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49 (2013.01); H01L 21/4825 (2013.01); H01L 21/4875 (2013.01); H01L 23/08 (2013.01); H01L 23/14 (2013.01); H01L 23/3121 (2013.01); H01L 23/492 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/83801 (2013.01);
Abstract

A power semiconductor device includes a die carrier, a power semiconductor chip coupled to the die carrier by a first solder joint, a sleeve for a pin, the sleeve being coupled to the die carrier by a second solder joint, and a sealing mechanically attaching the sleeve to the die carrier, the sealing being arranged at a lower end of the sleeve, wherein the lower end faces the die carrier, and wherein the sealing does not cover the power semiconductor chip.

Find Patent Forward Citations

Wedi, Andre. (2023). Power semiconductor device and method for fabricating a power semiconductor device (U.S. Patent No. 11652028). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11652028

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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