The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2023

Filed:

Sep. 16, 2020
Applicant:

Axiado Corporation, San Jose, CA (US);

Inventor:

Axel K. Kloth, Pacifica, CA (US);

Assignee:

AXIADO CORPORATION, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); H04L 9/08 (2006.01); G06F 21/57 (2013.01); G06F 8/654 (2018.01); G06F 21/12 (2013.01); H04L 9/14 (2006.01); H04L 9/32 (2006.01); G06F 9/4401 (2018.01); G06F 21/64 (2013.01); G06F 21/72 (2013.01); G06F 21/79 (2013.01); G06F 21/54 (2013.01); G06F 21/60 (2013.01); G06F 21/82 (2013.01); G06F 21/75 (2013.01);
U.S. Cl.
CPC ...
G06F 3/0623 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 8/654 (2018.02); G06F 9/4401 (2013.01); G06F 9/4403 (2013.01); G06F 9/4406 (2013.01); G06F 21/12 (2013.01); G06F 21/54 (2013.01); G06F 21/57 (2013.01); G06F 21/572 (2013.01); G06F 21/575 (2013.01); G06F 21/602 (2013.01); G06F 21/64 (2013.01); G06F 21/72 (2013.01); G06F 21/75 (2013.01); G06F 21/79 (2013.01); G06F 21/82 (2013.01); H04L 9/088 (2013.01); H04L 9/0861 (2013.01); H04L 9/0894 (2013.01); H04L 9/14 (2013.01); H04L 9/3278 (2013.01); G06F 2221/033 (2013.01); G06F 2221/034 (2013.01); G06F 2221/0751 (2013.01); G06F 2221/0755 (2013.01);
Abstract

Techniques in electronic systems, such as in systems including a processor complex having one or more system processors and one or more memories, provide improvements in one or more of system security, performance, cost, and efficiency. In some embodiments, the system includes secure boot logic (SBL) having immutable hardware enabled, in response to a reset of the system, to securely boot one or more boot processors of the SBL to execute known-good executable code. The SBL is then enabled to securely boot the one or more system processors to execute system code stored in a non-volatile one of the memories by copying the system code to another one of the memories from which at least one of the system processors is able to access the system code for a respective initial instruction fetch. The non-volatile memory is not accessible to the system processors.


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