The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2023

Filed:

Nov. 12, 2021
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventors:

Chiang-Lin Shih, New Taipei, TW;

Tseng-Fu Lu, New Taipei, TW;

Jeng-Ping Lin, Taoyuan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/74 (2006.01); H01L 23/535 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/20 (2023.02); H01L 21/743 (2013.01); H01L 23/535 (2013.01);
Abstract

The present disclosure provides a method for manufacturing a semiconductor structure. The method includes providing a substrate having a first top surface; forming an isolation region in the substrate to surround an active region; forming a recess in the active region; disposing a first conductive material within the recess to form a buried power line and a buried signal line; forming a first circuit layer and a second circuit layer on the first top surface of the substrate, wherein the first circuit layer covers the buried power line and the buried signal line, and the second circuit layer is separated from the first circuit layer; and forming a cell capacitor over the first circuit layer.


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