The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2023

Filed:

Oct. 06, 2021
Applicant:

Dell Products, L.p., Hopkinton, MA (US);

Inventors:

Peniel Charles, Bangalore, IN;

Owen Crowley, Carrigaline, IE;

Gopinath Marappan, Coimbatore, IN;

Assignee:

Dell Products, L.P., Hopkinton, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 45/125 (2022.01); H04L 45/24 (2022.01);
U.S. Cl.
CPC ...
H04L 45/125 (2013.01); H04L 45/24 (2013.01);
Abstract

Multipath hosts with the ability to detect path latency, report latency values on paths between the Latency Detecting (LD) host and a set of storage systems. The detected latency values are used by the storage system to create a data structure correlating path information with the detected latency values. When hosts without the ability to detect path latencies (non-LD hosts) connect to the storage systems, the path information about paths used by the non-LD hosts is used to determine reported latency values for paths with similar path information, to generate presumed latency values for the paths used by the non-LD hosts. Where paths used by non-LD hosts have higher latency values, the storage system sets a path attribute value, such as an ALUA state for the path, to signal non-LD hosts to preferentially use paths with lower presumed latency values.


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