The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2023
Filed:
Sep. 24, 2021
Low-latency, high-availability and high-speed serdes interface having multiple synchronization modes
International Business Machines Corporation, Armonk, NY (US);
Patrick James Meaney, Poughkeepsie, NY (US);
Ashutosh Mishra, Lagrangeville, NY (US);
Paul Allen Ganfield, Rochester, MN (US);
Christian Jacobi, West Park, NY (US);
Logan Ian Friedman, Nyack, NY (US);
Jentje Leenstra, Bondorf, DE;
Glenn David Gilda, Binghamton, NY (US);
Jason Andrew Thompson, Rochester, MN (US);
Yvonne Hanson Kleppel, Houston, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A computer-implemented method includes using a transmitter to send data from the transmitter through a plurality of lanes to a receiver using a synchronous operation mode that includes sending the data from the transmitter through the plurality of lanes to the receiver in a synchronous transmission manner that relies on an alignment between a transmitter clock frequency and a receiver clock frequency. A synchronous operation performance analysis (SOPA) is performed during the synchronous operation mode. A switch from the synchronous operation mode to an asynchronous operation mode is made based on a result of performing the SOPA. The asynchronous operation mode includes sending the data from the transmitter through the plurality of lanes to the receiver without requiring alignment between the transmitter clock frequency and the receiver clock frequency.