The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2023

Filed:

Jul. 09, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Nam Hee Lee, Seoul, KR;

Ho Joon Kim, Suwon-si, KR;

Jung-Ho Song, Gwangmyeong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/08 (2006.01); H03K 19/0175 (2006.01); G11C 16/04 (2006.01); G11C 16/30 (2006.01); G09G 3/20 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017509 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/30 (2013.01); G09G 3/20 (2013.01); G09G 2310/0289 (2013.01);
Abstract

A semiconductor device includes a memory cell array including a plurality of memory blocks, a control logic, a level shifter configured to generate a first internal voltage and a second internal voltage lower than the first internal voltage using a received external voltage on the basis of a control signal from the control logic, and a row decoder configured to provide the first and second internal voltages generated by the level shifter to the memory cell array. The level shifter generates the first internal voltage using the external voltage, generates the second internal voltage using the generated first internal voltage in a power-up mode of the semiconductor device, and generates the second internal voltage using the external voltage in a standby mode of the semiconductor device.


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