The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2023

Filed:

Jan. 11, 2021
Applicant:

Nanjing Zizhu Microelectronics Co., Ltd., Jiangsu, CN;

Inventor:

Yi Su, Cupertino, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4941 (2013.01); H01L 29/0623 (2013.01); H01L 29/4236 (2013.01);
Abstract

The present application provides a shielded gate trench (SGT) semiconductor apparatus and a manufacturing method thereof. The SGT semiconductor apparatus includes a heavily N-type doped semiconductor substrate; an N-type epitaxial layer formed on the semiconductor substrate; at least one trench structure formed on the epitaxial layer and accommodating at least one gate polysilicon layer, where the trench structure includes a shielding polysilicon layer and an inter-polysilicon oxide layer; a P-type doped body and an N-type doped source layer formed on the epitaxial layer; a contact region formed for the source and the shield polysilicon connected to a source metal and the gate polysilicon connected to a gate meal. The SGT semiconductor apparatus is surrounded by a shield polysilicon termination trench; the gate polysilicon connected to the gate metal bus line is made outside the active region across the shield polysilicon termination trench.


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