The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2023

Filed:

Jul. 24, 2019
Applicant:

Jerusalem College of Technology, Jerusalem, IL;

Inventors:

Shimon Mizrahi, Jerusalem, IL;

Raphael Berakhael Yehezkael, Jerusalem, IL;

Ruben Attia, Modi'in, IL;

Erez Lax, Ariel, IL;

Devora Berlowitz, Shoham, IL;

Moshe Goldstein, Jerusalem, IL;

David Dayan, Jerusalem, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/22 (2006.01); H03K 19/20 (2006.01); G06F 12/00 (2006.01); G06F 9/46 (2006.01); G06F 11/07 (2006.01); G06F 13/38 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1012 (2013.01); G06F 12/00 (2013.01); G11C 7/1051 (2013.01); G11C 7/1078 (2013.01); G11C 7/22 (2013.01); H03K 19/20 (2013.01); G06F 9/46 (2013.01); G06F 9/466 (2013.01); G06F 11/0724 (2013.01); G06F 13/38 (2013.01);
Abstract

It is an object of the disclosed technique to provide a novel method and system for shared concurrent access to a memory cell. In accordance with the disclosed technique, there is thus provided a system for shared concurrent access to a memory cell, which includes at least one shared memory cell, an evaluator and a plurality of processing agents coupled to the input of the evaluator. The evaluator is further coupled with the at least one memory cell. The evaluator is configured to evaluate an expression for performing multiple concurrent composite assignments on the at least one shared memory cell. The evaluator further allows each of the plurality of processing agents to perform concurrent composite assignments on the at least one shared memory cell. The composite assignments do not include a read operation of the at least one shared memory cell by the plurality of processing agents.


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