The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2023

Filed:

Dec. 20, 2019
Applicants:

Imec Vzw, Leuven, BE;

Katholieke Universiteit Leuven, Ku Leuven R&d, Leuven, BE;

Inventors:

Mohit Gupta, Heverlee, BE;

Bharani Chakravarthy Chava, Leuven, BE;

Wim Dehaene, Kessel-Lo, BE;

Sushil Sakhare, Heverlee, BE;

Assignees:

Imec vzw, Leuven, BE;

Katholieke Universiteit Leuven, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/063 (2023.01); G06F 7/544 (2006.01); G06N 3/04 (2023.01); G11C 11/54 (2006.01);
U.S. Cl.
CPC ...
G06N 3/063 (2013.01); G06F 7/5443 (2013.01); G06N 3/04 (2013.01); G11C 11/54 (2013.01);
Abstract

A circuit is provided. The circuit includes a sampling circuit connectable to a multibit memory array and that samples a voltage across a sampling capacitor, a capacitance network including a plurality of capacitors and switching elements such that the capacitance network has a capacitance that depends on the configuration of the switching elements, and a buffering circuit configured to charge the capacitance of the capacitance network based on the voltage across the sampling capacitor. The circuit is configured to operate the capacitance network in a first state and a second state, wherein the capacitance in the states depends on an input value to the circuit. The circuit is also configured to charge the capacitance network in the first state and to allow the charge to redistribute within the capacitance network when it changes from the first to the second state. A system and method including such circuits are also provided.


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