The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2023

Filed:

Feb. 10, 2022
Applicant:

Zhejiang University, Zhejiang, CN;

Inventors:

Zhiwei Xu, Hangzhou, CN;

Jiangbo Chen, Hangzhou, CN;

Jiabing Liu, Hangzhou, CN;

Hui Nie, Hangzhou, CN;

Zhihao Lv, Hangzhou, CN;

Chunyi Song, Hangzhou, CN;

Assignee:

ZHEJIANG UNIVERSITY, Hangzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/089 (2006.01); H03L 7/093 (2006.01); H03L 7/099 (2006.01); H03L 7/10 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0891 (2013.01); H03L 7/093 (2013.01); H03L 7/099 (2013.01); H03L 7/101 (2013.01);
Abstract

Disclosed is a fast lock phase-locked loop circuit for avoiding cycle slip, which belongs to the technical field of integrated circuits. The fast lock phase-locked loop circuit includes a phase frequency detector, a charge pump, an intermediate stage circuit, a loop filter, a voltage-controlled oscillator and a frequency divider. The phase frequency detector, the charge pump, the intermediate stage circuit, the loop filter and the voltage-controlled oscillator are connected in sequence; an output OUT end of the voltage-controlled oscillator is connected with an input IN end of frequency divider, and an output OUT end of the frequency divider is connected with an input IN end of the phase frequency detector to form a feedback path. The output clock frequency of the VCO and the expected frequency, i.e., the reference clock frequency and the feedback clock frequency, are prevented from being too close when the loop is started.


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