The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2023

Filed:

Dec. 20, 2021
Applicant:

Aydeekay Llc, Aliso Viejo, CA (US);

Inventor:

Robert W Kim, Aliso Viejo, CA (US);

Assignee:

AyDeekay LLC, Aliso Viejo, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0814 (2013.01); H03L 7/0995 (2013.01);
Abstract

An integrated circuit that includes a generating circuit is described. During operation, the generating circuit may provide an edge clock having a target phase within a clock period of an input clock, where the generating circuit does not include a delay-locked loop (DLL). For example, the generating circuit may include a gated ring oscillator that provides a reference clock having a first fundamental frequency that is larger than a second fundamental frequency of the input clock. Note that the gated ring oscillator may be programmable to adjust the first fundamental frequency within a predefined range of values. Moreover, the generating circuit may include a control circuit that determines a reference count of a number of edges of the reference clock within a reference period of the reference clock.


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