The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2023

Filed:

Jul. 14, 2021
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventors:

Masatsugu Yutani, Kyoto, JP;

Yuki Shiraishi, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/40 (2006.01); H01L 29/78 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42368 (2013.01); H01L 29/407 (2013.01); H01L 29/41741 (2013.01); H01L 29/4236 (2013.01); H01L 29/66727 (2013.01); H01L 29/66734 (2013.01); H01L 29/7813 (2013.01); H01L 29/7397 (2013.01);
Abstract

The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor chip having a first main surface including an active region and a peripheral region surrounding the active region; a first trench formed in the active region; a first insulating film formed on an inner surface of the first trench; a first electrode formed in the first trench interfacing the first insulating film, and forming a channel in a portion of the semiconductor chip facing the first insulating film; a second trench formed in the peripheral region and having a width greater a width of the first trench; a second insulating film formed on an inner surface of the second trench; and a second electrode formed in the second trench interfacing the second insulating film and electrically coupled to the first electrode.


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