The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2023

Filed:

Oct. 24, 2020
Applicant:

Mediatek Singapore Pte. Ltd., Singapore, SG;

Inventors:

Senthilkumar Jayapal, Singapore, SG;

Yang Bai, Singapore, SG;

Chaoqun Liu, Singapore, SG;

Yipin Wu, Singapore, SG;

Chih-Hung Tai, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G05F 1/56 (2006.01); H03K 5/01 (2006.01);
U.S. Cl.
CPC ...
G11C 5/147 (2013.01); G05F 1/56 (2013.01); H03K 5/01 (2013.01);
Abstract

A droop reduction circuit on a die includes a voltage detector circuit to detect voltage droop in a supply voltage received by a first load. The droop reduction circuit further includes a driver controller circuit to drive power switch (PSH) banks in response to detection of the voltage droop. Each of the PSH banks includes at least one power switch having an input terminal, a gate terminal, and an output terminal. The input terminal is to receive a secondary voltage, which is higher than the supply voltage and is also received by a second load on the die. The gate terminal is to receive a drive signal from the driver controller, and the output terminal is to pull up the voltage droop in the supply voltage.


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