The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2023

Filed:

Jan. 25, 2022
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Thomas E. Tkacik, Phoenix, AZ (US);

Srdjan Coric, Winchester, MA (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/14 (2006.01); G06F 12/0891 (2016.01); G06F 15/78 (2006.01); G06F 13/16 (2006.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 12/1408 (2013.01); G06F 9/30079 (2013.01); G06F 9/30189 (2013.01); G06F 12/0891 (2013.01); G06F 12/1425 (2013.01); G06F 12/1466 (2013.01); G06F 13/1626 (2013.01); G06F 13/1673 (2013.01); G06F 15/7807 (2013.01);
Abstract

Various embodiments relate to an inline encryption engine in a memory controller configured to process data read from a memory, including: a first data pipeline configured to receive data that is plaintext data and a first validity flag; a second data pipeline having the same length as the first data pipeline configured to: receive data that is encrypted data and a second validity flag; decrypt the encrypted data from the memory and output decrypted plaintext data; an output multiplexer configured to select and output data from either the first pipeline or the second pipeline; and control logic configured to control the output multiplexer, wherein the control logic is configured to output valid data from the first pipeline when the second pipeline does not have valid output decrypted plaintext data available.


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