The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 02, 2023
Filed:
Jan. 14, 2022
Korea Advanced Institute of Science and Technology, Daejeon, KR;
Gwangju Institute of Science and Technology, Gwangju, KR;
Hyo-Hoon Park, Daejeon, KR;
Jong-Bum You, Daejeon, KR;
Dong-Eun Yoo, Daejeon, KR;
Ju-Beom Lee, Daejeon, KR;
In Ki Kim, Gwangju, KR;
Tae Joon Seok, Gwangju, KR;
Geumbong Kang, Daejeon, KR;
Hyeonho Yoon, Daejeon, KR;
Nam-Hyun Kwon, Daejeon, KR;
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, Daejeon, KR;
GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY, Gwangju, KR;
Abstract
Disclosed are an optical phased array chip and a method of manufacturing the same. The optical phased array chip includes a plurality of optical switches and a plurality of optical phased arrays implemented on a single integrated circuit, wherein the single integrated circuit includes a silicon substrate, a lower layer formed on an upper portion of the silicon substrate, a silicon layer formed on an upper portion of the lower layer, a first upper layer, a second upper layer and a third upper layer sequentially arranged on the silicon layer, and an electrode that penetrates through the first upper layer while being grounded to the silicon layer and is formed on an upper portion of the first upper layer.