Display device having gate driving circuit stages located between pixels in the display area

Abstract

A display device, includes: pixels at a display area; gate lines at the display area, and connected to the pixels; carry clock lines and scan clock lines at the display area; and a gate driving circuit distributedly located at the display area, and connected to the carry clock lines, the scan clock lines, and the gate lines. The gate driving circuit includes a plurality of stages, each of the stages to output, as a carry signal, a carry clock signal supplied through a corresponding carry clock line from among the carry clock lines, and to output, as a scan signal, a scan clock signal supplied through a corresponding scan clock line from among the scan clock lines. The corresponding carry clock line and the corresponding scan clock line corresponding to one stage from among the stages are spaced from each other with at least one of the pixels interposed therebetween.