The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2023

Filed:

May. 15, 2018
Applicant:

Avx Corporation, Fountain Inn, SC (US);

Inventor:

Jeffrey Cain, Greenville, SC (US);

Assignee:

KYOCERA AVX Components Corporation, Fountain Inn, SC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/12 (2006.01); H01G 4/30 (2006.01); H01G 4/005 (2006.01); H05K 1/18 (2006.01); H01G 4/232 (2006.01); H01G 4/012 (2006.01); H01G 4/252 (2006.01); H05K 3/34 (2006.01); H05K 1/02 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01G 4/1227 (2013.01); H01G 4/005 (2013.01); H01G 4/012 (2013.01); H01G 4/232 (2013.01); H01G 4/252 (2013.01); H01G 4/30 (2013.01); H05K 1/181 (2013.01); H01L 24/08 (2013.01); H01L 24/16 (2013.01); H01L 2224/08265 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19103 (2013.01); H05K 1/0231 (2013.01); H05K 3/3436 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/1053 (2013.01); H05K 2201/10515 (2013.01);
Abstract

The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer. In addition, external terminals are electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the capacitor and a bottom surface of the capacitor opposing the top surface of the capacitor.


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