The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2023

Filed:

Jun. 25, 2019
Applicant:

Seereal Technologies S.a., Munsbach, LU;

Inventor:

Enrico Zschau, Dresden, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03H 1/08 (2006.01); G03H 1/22 (2006.01); G03H 1/26 (2006.01);
U.S. Cl.
CPC ...
G03H 1/0841 (2013.01); G03H 1/0808 (2013.01); G03H 1/2294 (2013.01); G03H 2001/0858 (2013.01); G03H 2001/2605 (2013.01); G03H 2210/30 (2013.01); G03H 2210/452 (2013.01); G03H 2226/02 (2013.01);
Abstract

An apparatus and a method for optimized calculation of 2D sub-holograms for object points of a three-dimensional scene and a pipeline for real-time calculation of holograms are provided. The invention shortens the calculation time of a hologram for representing a three-dimensional scene and/or to reduce the calculation complexity of such a hologram. This is achieved by a 2D sub-hologram of an object point, which has image elements of the spatial light modulator, comprises a half 1D sub-hologram, where the radius of each image element is determined and each image element of the 2D sub-hologram is fixedly assigned to at least one image element of the half 1D sub-hologram with identical or similar radius by way of an electronic circuit, by a method for encoding a hologram, and by a pipeline on the basis of FPGA and/or ASIC.


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