The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2023

Filed:

Jul. 02, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Dae Shik Kim, Hwaseong-si, KR;

Young Gu Jin, Osan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H04N 25/771 (2023.01); H04N 25/75 (2023.01); H04N 25/40 (2023.01); H04N 25/76 (2023.01); H04N 25/77 (2023.01);
U.S. Cl.
CPC ...
H01L 27/14634 (2013.01); H01L 27/14609 (2013.01); H01L 27/14643 (2013.01); H04N 25/40 (2023.01); H04N 25/75 (2023.01); H04N 25/76 (2023.01); H04N 25/77 (2023.01); H04N 25/771 (2023.01);
Abstract

An image sensor comprises an upper chip including pixels; and a lower chip placed below the upper chip, wherein a pixel of the pixels includes an optical conversion element configured that light is incident on the optical conversion element, a first storage gate or a first storage node which is electrically connected to the optical conversion element and configured to store electric charge transferred from the optical conversion element during a first time interval, and a second storage gate or a second storage node which is electrically connected to the optical conversion element and configured to store the electric charge transferred from the optical conversion element during a second time interval different from the first time interval, the pixel is configured to generate a first pixel signal on the basis of the electric charge stored in the first storage gate, the lower chip includes a frame buffer.


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