The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2023

Filed:

Aug. 14, 2020
Applicant:

Kioxia Corporation, Minato-ku, JP;

Inventors:

Takahito Nishimura, Kuwana, JP;

Genki Kawaguchi, Yokkaichi, JP;

Yusuke Okumura, Yokkaichi, JP;

Assignee:

Kioxia Corporation, Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/11565 (2017.01); H01L 27/1157 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes a substrate, insulating members, first conductive layers, first pillars, and second pillars. The substrate includes a first area, a second area, block regions, and a first dummy block region. The insulating members are arranged at respective boundary portions of the block regions and the first dummy block region. The first conductive layers are partitioned by the insulating members. The first pillars penetrates the first conductive layers in a region where the first area and the block regions overlap. The second pillars penetrates at least one of the first conductive layers in a region where the first area and the first dummy block region overlap.


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