The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2023

Filed:

Sep. 28, 2020
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Tomoya Nakayama, Matsumoto, JP;

Akihiro Osawa, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 23/46 (2006.01); H01L 23/053 (2006.01); H01L 23/473 (2006.01); H01L 23/538 (2006.01); H01L 25/07 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 23/053 (2013.01); H01L 23/46 (2013.01); H01L 23/473 (2013.01); H01L 23/5386 (2013.01); H01L 24/37 (2013.01); H01L 24/40 (2013.01); H01L 25/072 (2013.01);
Abstract

Provided is a semiconductor device including: a circuit board; a wiring pattern; a first semiconductor chip and a second semiconductor chip; a first lead frame; and a second lead frame; wherein the first lead frame and the second lead frame each comprises: a chip joining portion provided above at least a part of the semiconductor chip; a wiring joining portion provided above at least a part of the wiring pattern; and a bridging portion for connecting the chip joining portion and the wiring joining portion; and in the first direction, a space between the bridging portion of the first lead frame and the bridging portion of the second lead frame is smaller than a space between the chip joining portion of the first lead frame and the chip joining portion of the second lead frame.


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