The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2023

Filed:

Aug. 25, 2021
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Eric J. Bergman, Kalispell, MT (US);

Robert Mikkola, Kalispell, MT (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C25D 3/50 (2006.01); C25D 5/02 (2006.01); H01L 21/768 (2006.01); C25D 5/54 (2006.01); H01L 21/288 (2006.01); C23C 14/18 (2006.01); H01L 21/28 (2006.01); C23C 16/455 (2006.01);
U.S. Cl.
CPC ...
C25D 3/50 (2013.01); C23C 14/18 (2013.01); C23C 16/45525 (2013.01); C25D 5/02 (2013.01); C25D 5/54 (2013.01); H01L 21/2885 (2013.01); H01L 21/28114 (2013.01); H01L 21/76873 (2013.01);
Abstract

Exemplary methods of electroplating may include providing a patterned substrate having at least one opening, where the opening includes one or more sidewalls and a bottom surface. The methods may also include plating a first portion of ruthenium-containing material on the bottom surface of the opening at a first deposition rate and a second portion of ruthenium-containing material on the sidewalls of the opening at a second deposition rate, where the first deposition rate is greater than the second deposition rate. The methods may be used to make integrated circuit devices that include void-free, electrically-conductive lines and columns of ruthenium-containing materials.


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