The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 11, 2023
Filed:
Nov. 30, 2021
Applicant:
Analog Devices, Inc., Wilmington, MA (US);
Inventors:
Shaolong Liu, Cambridge, MA (US);
Daniel Peter Canniff, Brookline, MA (US);
Abhishek Bandyopadhyay, Winchester, MA (US);
Akira Shikata, Chelsea, MA (US);
Assignee:
ANALOG DEVICES, INC., Wilmington, MA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01); H03M 1/00 (2006.01); H03M 1/06 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 3/37 (2013.01); H03M 3/454 (2013.01); H03M 1/00 (2013.01); H03M 1/06 (2013.01); H03M 1/12 (2013.01); H03M 3/00 (2013.01);
Abstract
An excess loop delay compensation (ELDC) technique for use with a successive approximation register (SAR) based quantizer in a continuous time delta-sigma ADC is described. The techniques can efficiently program and calibrate the ELD gain in ELD compensation SAR quantizers. An ELDC circuit can include a charge pump having a digitally programmable capacitance to adjust a gain, such as the gain of the ELDC digital-to-analog converter (DAC) or the gain of the SAR DAC.