The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2023

Filed:

Jun. 03, 2021
Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Hye-Hyang Park, Yongin-si, KR;

Joo-Hee Jeon, Anyang-si, KR;

Seung-Ho Jung, Hwaseong-si, KR;

Chaun-Gi Choi, Suwon-si, KR;

Hyeon-Sik Kim, Yongin-si, KR;

Hui-Won Yang, Seoul, KR;

Eun-Young Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 51/00 (2006.01); H01L 51/52 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3262 (2013.01); H01L 27/326 (2013.01); H01L 27/3211 (2013.01); H01L 27/3246 (2013.01); H01L 27/3248 (2013.01); H01L 27/3258 (2013.01); H01L 51/0096 (2013.01); H01L 51/5253 (2013.01); H01L 51/5256 (2013.01); H01L 51/5275 (2013.01); H01L 27/1222 (2013.01); H01L 27/1248 (2013.01); H01L 29/513 (2013.01); H01L 29/78645 (2013.01); H01L 29/78666 (2013.01); H01L 29/78675 (2013.01); H01L 51/0097 (2013.01); H01L 2251/301 (2013.01);
Abstract

A display device may include a light emitting element, a buffer layer, a gate insulation layer, and a switching element. A refractive index of the gate insulation layer may be equal to a refractive index of the buffer layer. The switching element may be electrically connected to the light emitting element and may include an active layer and a gate electrode. The active layer may be positioned between the buffer layer and the gate insulation layer and may directly contact at least one of the buffer layer and the gate insulation layer. The gate insulation layer may be positioned between the active layer and the gate electrode and may directly contact at least one of the active layer and the gate electrode.


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