The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2023

Filed:

Jun. 17, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventor:

Yuji Setta, Kuwana, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/08 (2013.01); H01L 24/05 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01);
Abstract

A semiconductor device of an embodiment includes a first chip having a memory cell array, and a second chip having a control circuit. The first chip includes a substrate, a pad, a first structural body, and a second structural body. The substrate is arranged on the side opposite to a joined face of the first chip joined to the second chip, and includes a first face, a second face, and an opening extending from the second face to the first face in a first region. The memory cell array is provided between the first face and the opposed joined face. The pad is provided in the opening. The first structural body is provided between the first face and the joined face, and is electrically connected to the pad. The second structural body is provided between the first face and the joined face in the first region.


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