The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 11, 2023
Filed:
May. 28, 2021
Applicant:
Formfactor, Inc., Livermore, CA (US);
Inventors:
Roy J. Henson, Pleasanton, CA (US);
Shawn O. Powell, Pleasant Hill, CA (US);
Assignee:
FormFactor, Inc., Livermore, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 25/065 (2023.01); H01L 23/13 (2006.01); H01L 23/538 (2006.01); H05K 1/18 (2006.01); H01R 12/52 (2011.01);
U.S. Cl.
CPC ...
H01L 23/49805 (2013.01); H01L 23/13 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 25/0652 (2013.01); H01R 12/523 (2013.01); H05K 1/181 (2013.01); H05K 2201/10378 (2013.01); H05K 2201/10454 (2013.01); H05K 2201/10522 (2013.01); H05K 2201/10734 (2013.01);
Abstract
3D electrical integration is provided by connecting several component carriers to a single substrate using contacts at the edges of the component carriers making contact to a 2D contact array (e.g., a ball grid array or the like) on the substrate. The resulting integration of components on the component carriers is 3D, thereby providing much higher integration density than in 2D approaches.