The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 11, 2023
Filed:
Jun. 23, 2021
Inventec (Pudong) Technology Corporation, Shanghai, CN;
Inventec Corporation, Taipei, TW;
Ye Liu, Shanghai, CN;
INVENTEC (PUDONG) TECHNOLOGY CORPORATION, Shanghai, CN;
INVENTEC CORPORATION, Taipei, TW;
Abstract
A circuit structure with automatic PCIe lane configuration adjustment and a method thereof are disclosed. The circuit structure includes a plurality of PCIe riser cards and a motherboard. The PCIe riser cards are of at least two lane sizes each associated with a PCIe size identifier. The motherboard includes a plurality of PCIe ports, a CPLD module, a storage unit, a BMC module and a BIOS unit. The PCIe ports are electrically connected to the respective PCIe riser cards via a plurality of PCIe cables. The CPLD module is electrically connected to the PCIe ports so as to be able to read the PCIe size identifiers thereof and determine current configuration information from a comparison between the PCIe size identifiers and present signals. The storage unit stores predefined PCIe configuration information, and the BMC module is configured to issue a match signal when finding a match between the current configuration information and the predefined PCIe configuration information, thus allowing booting of the BIOS unit.