The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2023

Filed:

Feb. 11, 2020
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Daniel Lustig, Somerville, MA (US);

Oreste Villa, West Richland, WA (US);

David Nellans, Round Rock, TX (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 11/30 (2006.01); G06F 9/54 (2006.01); G06F 12/1027 (2016.01); G06F 11/07 (2006.01); G06F 12/0882 (2016.01);
U.S. Cl.
CPC ...
G06F 9/5072 (2013.01); G06F 9/5016 (2013.01); G06F 9/544 (2013.01); G06F 11/0772 (2013.01); G06F 11/3006 (2013.01); G06F 11/3037 (2013.01); G06F 12/0882 (2013.01); G06F 12/1027 (2013.01);
Abstract

In general, an application executes on a compute unit, such as a central processing unit (CPU) or graphics processing unit (GPU), to perform some function(s). In some circumstances, improved performance of an application, such as a graphics application, may be provided by executing the application across multiple compute units. However, when using multiple compute units in this manner, synchronization must be provided between the compute units. Synchronization, including the sharing of the data, is typically accomplished through memory. While a shared memory may cause bottlenecks, employing local memory for each compute unit may itself require synchronization (coherence) which can be costly in terms of resources, delay, etc. The present disclosure provides read-write page replication for multiple compute units that avoids the traditional challenges associated with coherence.


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