The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2023

Filed:

Jun. 24, 2019
Applicant:

Zhejiang Dunan Artificial Environment Co., Ltd., Hangzhou, CN;

Inventor:

Tom Kwa, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 41/25 (2013.01); H01L 41/27 (2013.01); B81C 1/00 (2006.01); G01L 9/00 (2006.01); H01L 41/053 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
G01L 9/0052 (2013.01); B81C 1/00158 (2013.01); G01L 9/0042 (2013.01); G01L 9/0054 (2013.01); H01L 41/053 (2013.01); H01L 41/25 (2013.01); H01L 41/27 (2013.01); B81B 2201/0264 (2013.01); B81C 1/00523 (2013.01); B81C 1/00626 (2013.01); B81C 1/00785 (2013.01); H01L 21/823828 (2013.01); H01L 21/823864 (2013.01); Y10T 29/42 (2015.01); Y10T 29/49005 (2015.01);
Abstract

Methods of manufacturing a pressure sensor from an SOI wafer are provided. In preferred embodiments, the methods comprise forming a cavity in a SOI wafer by removing a first portion of a bottom silicon layer on the bottom side of the SOI wafer to a depth of an insulator layer; depositing a layer of a second material over the cavity; removing both the silicon layer and the insulator layer from a top side of the SOI wafer in a first plurality of areas above the cavity to form a diaphragm from the layer of a second material, wherein at least one support structure that spans the diaphragm is formed from material above the cavity that was not removed; and forming at least one piezoresistor in the SOI wafer over an intersection of the support structure and SOI wafer at an outside edge of the diaphragm.


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