The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2023

Filed:

Jan. 11, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Robin Gupta, Santa Clara, CA (US);

Abishek Manian, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03H 7/30 (2006.01); H03H 7/40 (2006.01); H03K 5/159 (2006.01); H03L 7/08 (2006.01); H03L 7/087 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0807 (2013.01); H03L 7/087 (2013.01); H04L 7/0337 (2013.01);
Abstract

Systems, circuitry and methods measure data transition metrics of incoming data, average the measurements of each metric at a set time interval for multiple intervals to generate multiple averaged values, and select a maximum of the multiple averaged values for each metric. The maximum values of each measurement cycle are compared with corresponding multiple thresholds defining respective ranges, and the outputs are used by a state machine to determine an equalization level and the rate of the incoming data. When the thresholds are not met, the state machine adjusts the equalization level, and when a sub-rate is detected using a third threshold for one of the metrics, the clock rate is also adjusted. Locking of a clock and data recovery (CDR) circuit is attempted when the maximum values for each metric are within their respective ranges.


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